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 LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
DESCRIPTION
KEY FEATURES Filter Free Operation 15W +15W Output Power @ 4 load: THD+N < 1% High Efficiency > 85% Full Audio Bandwidth: 20Hz to 20KHz Low Distortion < 0.15% @ 30% Max Power, 1KHz High Signal-to-Noise Ratio: 90dB Wide Supply Voltage Range 5.0V ~ 15V Low Quiescent Current < 30mA Turn ON/OFF POP Free Standby / Mute Feature Built-in Under Voltage Lockout Thermal Protection Short Circuit Protection
APPLICATIONS
The LX1708 is part of a new generation of fully integrated stereo class-D amplifiers from Microsemi. This CMOS audio amplifier is optimized for highly efficient operation and minimum system cost. The stereo BTL (Bridge-tied-load) configuration uses 3-level PWM modulation. This allows eliminating the LC filter to reduce the system cost and simplify the system design. The LX1708 outputs 15W into each of two channels with better than 85% efficiency.
The part features on-board H-bridge output stages with low RDSON. External bootstrap capacitors are all that is required to provide the gate drive to the all-NFET output stage since onboard bootstrap diodes are provided. The LX1708 also features Mute and Standby modes, over-current protection, POP-free turn-on and turn-off, undervoltage lockout, over-voltage protection, and over-temperature protection. The LX1708 is offered in a small footprint, low profile surface mountable 32-pin Micro Lead Quad Package (MLPQ) in 7mm x 7 mm.
WWW .Microsemi .C OM
LCD TV Car Navigation Computer: Portable Sound System
IMPORTANT: For the most current data, consult MICROSEMI's website: http://www.microsemi.com
PRODUCT HIGHLIGHT
STBY 5V
AVSS1 PVSS1N OUT1N BOOT1N PVDD1
AVSS2 PVSS2N OUT2N BOOT2N
V5V
STATUS
N.C.
ROSC
TMON
PVDD
PVDD1 BOOT1P OUT1P
LX1708
TCTRL MUTE VREF IN1P N.C.
STBY
PVDD2 PVDD2 BOOT2P OUT2P
PVDD
PVSS1P IN1N
PVSS2P IN2P IN2N
IN2N IN1N IN1P IN2P MUTE
LX1708 LX1708
PACKAGE ORDER INFO
TA (C) -40 to 85
LQ
Plastic MLPQ 32-Pin 7mmx7mm LX1708ILQ
RoHS Compliant / Pb-free
Note: Available in Tape & Reel. Append the letters "TR" to the part number. (i.e. LX1708ILQ-TR)
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 1
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
ABSOLUTE MAXIMUM RATINGS Analog Supply Voltage (PVDD) ................................................................. -0.3V to 16.5V Supply Voltage (V5V) ......................................................................................... -0.3 to 6V STBY to VSS......................................................................................-0.3V to V5V + 0.3V IN1P/M, IN2P/M .................................................................................-0.3V to V5V +0.3V Maximum Operating Junction Temperature .............................................................. 150C Storage Temperature Range.........................................................................-65C to 150C Package Peak Temp. for Solder Reflow (40 seconds maximum exposure) ... 260C (+0 -5)
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal.
PACKAGE PIN OUT
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BOOT1N
BOOT1P
30
PVSS1N
PVSS1P
32
OUT1N
OUT1P
31
PVDD1
29
PVDD1
28
27
26
25 24 23 22 21 20 19 18 17
STBY IN1P IN1N N.C. N.C. IN2N IN2P MUTE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TCTRL TMON AVSS2 ROSC VREF AVSS1 V5V STATUS
PVSS2P
OUT2P
BOOT2P
PVDD2
PVDD2
BOOT2N
OUT2N
PVSS2N
THERMAL DATA
LQ PACKAGE
(Top View)
LQ
Plastic MLPQ 32-Pin 7mm x 7mm THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA
Pb-free 100% Matte Tin Lead Finish
15.5C/W
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
P D PACKAGE DATA
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
FUNCTIONAL PIN DESCRIPTION Name PVSS1P PVSS1N PVSS2P PVSS2N PVDD1 PVDD2 V5V AVSS1 AVSS2 IN1N IN1P IN2N IN2P OUT1N OUT1P OUT2N OUT2P BOOT1N BOOT1P BOOT2N BOOT2P VREF Power Ground # Of Pins 4 Description Power Ground for the two H-bridge output drivers. Power Supply for the two H-bridge output drivers. Operating voltage is from 4.5 up to 15V. Current draw will be up to 3.2A at 2X15W into 8ohms or up to 4.5A at 2X15W into 4 ohms. These are peak currents when the part is run at maximum rated power on both channels. Analog Power Supply for the analog signal processing section. Operating voltage is from 4.5 up to 5.5V. Analog Ground for the analog signal processing section. Should be at the same voltage as PVSS. Also used to bias the substrate. Differential analog audio inputs for each channel. The common mode voltage will be set by the LX1708 to around 2.25V. Differential high power audio outputs for each channel. Each output will swing between PVDD and PVSS. These outputs are driven by an on-chip H-bridge output driver which uses low Rdson NFETs. Bootstrap voltage pins which provide the high voltage needed to drive the upper NFET. A bootstrap capacitor should be placed between the respective output and these pins. 2.25V reference voltage which serves as a local "GND" reference. An external compensation capacitor of at least 1uF should be connected between this pin and AVSS. Logic level control which mutes the audio signal when high. This will be a four level pin to allow testing of the low gain mode as follows: From 0 to 1/4 of V5V, the gain will be normal. From 1/4 of V5V to 1/2 of V5V, the gain will be low Above 1/2 of V5V, the gain will be muted. Logic level control which places the chip into sleep mode when high. The logic threshold will be at 1/2 of V5V. Digital monitoring pin which is used to flag internal fault states. This pin will be synchronized with the internal clock to prevent glitches. See the STATUS flag table for a summary of which conditions will force this pin to go high. Frequency control pin. A resistor between this pin and GND will set the oscillation frequency for the Class-D modulator. Test purpose only, Connect to AVSS1 Test purpose only, left open. No Connect
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Power Supply Power Supply Analog Ground Analog Input
4
1 2
4
Digital Output
4
Digital Output Analog Output CMOS Input CMOS Input CMOS Output Analog Input CMOS Input Analog I/O
4
1
MUTE
1
STBY STATUS ROSC TCTRL TMON N.C.
1 1 1 1 1 2
P D PACKAGE DATA
The STATUS pin will go under any of the following conditions: STBY is high. This indicates that the chip is in "stand-by" mode. V5V is below the UVLO threshold. The outputs will be forced into the low state. PVDD is below the PVDD UVLO threshold. The outputs will be forced into the low state. PVDD is above the over-voltage threshold which is about 17.8V. The outputs will be forced into the low state. The die temperature is above about 140C. This indicates that the part has gone in to gain foldback. A short circuit at the output has caused the output devices to shut off due to excessive temperature.
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 3
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS Unless otherwise specified, the following specifications apply over the operating ambient temperature -40C < TA < 85C except where otherwise noted and the following test conditions: PVDD = 12V, PVSS = AVSS = 0V, V5V = 5V, ROSC = 25K
Parameter OSCILLATOR Oscillator Frequency Temperature Stability POWER SUPPLY Supply Voltage UVLO UVLO Hysteresis +5V Supply UVLO UVLO Hysteresis Stand-By Current Operating Current Stand-By Current Operating Current Power Supply Rejection Ratio 1 Reference Voltage GAIN Stage Gain @ 0dB Volume Mute Gain @ minimum volume OFFSET Output DC Offset INPUT STAGE Input Resistance Common Mode Voltage OUTPUT STAGE MOSFET On Resistance THERMAL Thermal Shut Off Junction Temperature Hystersis MUTE / STBY / MASTER MUTE Threshold STBY Threshold STBY To Output Enable Power On Reset Delay Note 1: Not ATE Tested After Power on Reset Pulse, Not Quick Mode 0.20 Mute Mode RDSON IDS = 200mA 280 150 25 m C C V V 3.8 Clocks mS PVDD PVDD PVDD V5V V5V V5V IQQ IQQ IQQ5V5 IQQ5V5 PSRR VREF G GMUTE VOFF RIN VCM FOSC Varies with ROSC resistor value, value shown is for default conditions. R = 25K TA = 0C to 70C TA = -40C to 125C 5.0 Start-up Voltage 4.5 Start-up Voltage For PVDD, STBY high For PVDD, STBY low, Mute high For 5V5, STBY high For 5V5, STBY low, Mute high For PVDD C bypass = 1F f = 1KHz Mute active, Input shorted Measured Differentially. OUT1- to OUT1+ OUT2- to OUT2+ 4.25 250 10 10 10 7 55 2.25 20 0.01 100 22 2.25 300 5 8 12 4.50 500 15 4.90 5.5 4.50 50 30 15 KHz % % V V mV V V mV A mA A mA dB V V/V V/V mV K V Symbol Test Conditions LX1708 Typ Units
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Min
Max
V5V 2
V5V 2
16384 0.30
E ELECTRICALS
Note: Functionality over the -40C to +85C operating range is assured by design characterization and correlation. Caution: Power Up/Down Sequencing Power-on: Apply V5V w/STBY=V5V. Then apply PVDD. Then bring STBY low. Power-off: Bring STBY high such that STBY=V5V. Then shut off PVDD. Then shut off V5V.
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 4
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
SYSTEM MODULE CHARACTERISTICS Unless otherwise specified, the following specifications apply over the operating ambient temperature -40C < TA < 85C except where otherwise noted and the following test conditions: PVDD = 12V, PVSS = AVSS = 0V, V5V = 5V, ROSC = 25K, RL = 4.
Parameter AUDIO CHARACTERISTICS Symbol Test Conditions LX1708 Typ Units
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Min
Max
Output Power Stereo
PO
Total Harmonic Distortion Stereo Power Efficiency Channel Crosstalk Audio Bandwidth Stage Gain Stereo Mute Output Signal to Noise Ratio Output Noise Floor Common Mode Rejection Ratio Output Short Circuit Protection High Low
THD+N
VXTALK BW VMUTE SNR VN CMRR TSENSE
THD+N < 1% THD+N <10% POUT = 50% of Maximum Power, FIN = 1KHz with diodes POUT = 50% of Maximum Power, FIN = 1KHz No diodes POUT = 1W, FIN = 20Hz~20KHz POUT = Max, THD+N < 1% POUT = 1W, F = 1KHz POUT = 1W, F = 20-20KHz VIN = 200mVRMS, F = 20Hz~20KHz VIN = 2VRMS, F = 20Hz~20Khz Input short, system muted, stereo FIN = 1KHz @ 20Hz-20KHz non A-weighted Input short, non A-weighted @ 20Hz-20KHz 55 Thermal Shutdown Mode
12 15 0.2 0.7 0.4 90 -60 3 20 0.01 -60 90 200 150
W
% % dB dB V/V dB dB VRMS dB C
E ELECTRICALS
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 5
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
SIMPLIFIED BLOCK DIAGRAM
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PVDD1
PVDD2
V5V
BOOT1P
OUT1P
IN1P IN1N
+ -
PWM PVDD
BOOT1N
OUT1N
LPF From H-Bridge LPF Clock LPF From H-Bridge LPF
BOOT2P
OUT2P
IN2P IN2N
+ V5V
PWM
PVDD
BOOT2N
OUT2N
De-POP
BLOCK DIAGRAM BLOCK DIAGRAM
AVSS2
AVSS1
Figure 1 - Simplified Block Diagram
PVSS1
PVSS2
PVSS3
PVSS4
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
TEST SYSTEM SET-UP
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NORM
VCOM
STBY
GND
CTR
TB4
+5V
Power Supply
GND
TB3
+5V AGND
JP5 Single
JP3 JP4 Dual
PVDD GND VNEG TB1
+V GND
Power Supply
OUT1-
J1 IN1IN1+ OUT1+ OUT1-
Audio Precision
OUT1+ GND OUT2OUT2+
IN1+ RL IN1IN2RL IN2+
LX1708
IN2IN2+ J2
OUT2OUT2+ TB2
System One
Audio Precision System One
JP7 14dB 20dB MNOR MQUK SNOR MUTE SQUK
JP6
LX1725 Evaluation Module
Oscilloscope
Figure 2 - System Test Set-up Diagram
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 7
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
APPLICATION CIRCUITS
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TEST PURPOSE
+VIN RTN TB1 CR2 1N5817 OUTR+ +5V RTN TB1 VIN TP1 GND C7 1F C8 1F J1 C9 1F C10 1F C21 4.7nF VIN C2 22F 6.3V +5V TP2 1P TP3 1N OUTRC1 47F 25V VIN CR1 1N5817 R8 470 R9 470
TP4 RT-P
C23 4.7nF
C24 2.2nF
TEST PURPOSE
R6 470 R7 470 TP5 RT-N
C22 2.2nF
PVDD1
BOOT1N
SLEEP RCA Jack
INR+ INRJP1 HEADER 1 INLINL+ JP2 HEADER 2 J2 +5V
C3 0.47F C4 0.47F
STBY IN1P IN1N N/C
PVSS1P OUT1P BOOT1P
U1
OUT1N PVSS1N
PVDD1
+5V
SW1
TCTRL TMON AVSS2 ROSC VREF AVSS1 V5V
R1 25K C11 1F
C5 0.47F C6 0.47F
N/C IN2N IN2P MUTE
Part LX1708
BOOT2N
PVSS2P OUT2P BOOT2P
PVSS2N
OUT2N
PVDD2
PVDD2
STATUS
C12 1F TP6 STATUS +5V
M L
RCA Jack
N Header 3x2 C13 1F VIN TP8 2P TP9 2N C14 1F C15 1F TP7 GND
C16 1F VIN
TEST PURPOSE
TP10 LEFT-N
R2 470 C17 4.7nF
R3 470 C18 2.2nF
CR8 1N5817
OUTLOUTL+
APPLICATIONS APPLICATIONS
CR7 1N5817
TEST PURPOSE
TP1 LEFT-P
R4 470 C19 4.7nF
R5 470 C20 2.2nF
Note 1: CR1, CR2, CR7, CR8 can be used for lower distortion performance.
Figure 3 - Typical Application
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 8
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
FUNCTIONAL DESCRIPTION FILTERLESS CLASS-D MODULATION
The LX1708 drives each output between PVDD and PVSS using an all-NFET, bootstrapped, H-bridge driver for each channel. High efficiency is obtained by forcing all transistors to operate either completely on or completely off as required for a true class-D amplifier. The entire signal path from input to output is differential to reject any sources of common-mode noise or distortion. Even the triangle wave operates differentially. Filterless class-D modulation operates such that with no input signal, the outputs switch at 300KHz and are in-phase with each other. Because the two signals are identical, the differential signal to the speaker is zero. As a direct result, there is no requirement for a low-pass LC filter to present a high impedance at the modulation frequency. This allows a cheaper and simpler audio amplifier to be designed . As the input signal goes positive, the duty cycle to the positive output increases while the duty cycle of the negative output decreases. This produces a net positive current flow into the load. A negative signal reduces the positive output duty cycles and increases the negative output duty cycle. The differential signal actually appears at twice the modulation frequency and alternates between +PVDD, 0, and -PVDD which allows the parasitic inductance of the load to effectively filter the switching signal so that only the audio band portion remains. Because each speaker is driven by an in-phase signal, the common mode voltage to the speaker switches at the full PVDD amplitude at 300KHz. This is a possible source of EMI radiation. Typically, a ferrite bead is placed with a small common-mode filter capacitor to reduce EMI generation by filtering the edges of the output signals.
NOISE-FREE TURN-ON AND OFF
signal is de-asserted and the audio input signal is allowed to drive the pulse-width-modulator which then adjusts the output duty cycle as necessary to drive the speaker. At turn-off, the internal mute signal is asserted to silence the input audio signal. The outputs continue switching in this muted condition for about 0.6mS prior to being pulled low. Once the outputs are forced low, the error amplifier is reset so that the part is ready to being a new power-up sequence. This scheme basically limits the pop noise at turn-on or off to be no larger than the differential offset voltage of the error amplifier.
AC-COUPLING AND BOOTSTRAP CAPACITORS
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Input AC-coupling capacitors should be used to block any input DC and low frequency components below the desired low frequency corner. Since the input resistance to the LX1708 is 25Kohms, a 20Hz low frequency corner can be achieved with a 0.32F AC-coupling capacitor. 1F bootstrap capacitors are required at each output to supply the gate drive voltage for the upper level NFET in each half-bridge. THERMAL OVERLOAD PROTECTION The LX1708 protects itself by monitoring its operating temperature in two different ways. A general thermal protection scheme monitors the overall die temperature. Above 140C, the amplifier gain is reduced by 6dB so that the audio signal is still amplified, but the on-chip power dissipation is halved. When the die temperature then goes below 110C, the amplifier gain is restored. Above 150C, the LX1708 forces all outputs to PVSS so that no power is dissipated until the chip cools down to 110C. A dynamic thermal protection scheme operates by placing temperature sensors near each of the output devices. When a differential temperature rise of about 60C occurs above the core die temperature, which indicates a local short circuit condition, the outputs are disabled to protect the part. This provides short circuit protection for differential shorts and shorts to ground. Since the outputs go low to PVSS, shorts to PVDD are NOT protected.
Noise-free turn-on and off is accomplished by carefully sequencing the signal path when the amplifier is enabled or disabled. Prior to turn-on, the outputs are initially both at PVSS so there is no differential signal. The internal error amplifier is held in a reset condition so that the internal loop compensation components are "ready to go". When the outputs begin to toggle, the audio signal path is muted for about 1.6mS. Following that time, the internal mute
APPLICATIONS APPLICATIONS
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 9
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
APPLICATION NOTE/PCB DESIGN GUIDLINE
WWW .Microsemi .C OM
OSCILLATOR The value of R1 decides the switching frequency, smaller value gives the system faster switching. See Figure 4, SW Frequency vs. R1
SW Freq. vs. ROSC 1,400k 1,200k SW Freq. (Hz) 1,000k 800k 600k 400k 200k 0k 5K
PCB DESIGN GUIDELINES
17.5K
30K ROSC (ohm)
42.5K
Figure 4 - SW Frequency vs. R1 BOOTSTRAP CAPACITORS C8, C9, C14, and C15 are bootstrap capacitors for internal NMOSFETs gate drive voltage, they work together with internal diodes to boost the PVDD voltage doubled, over the threshold voltage of VGS. If BOOT1P, BOOT1N, BOOT2P, and BOOT2N are probed, 2x PVDD voltages on the PWM waveform will be observed. Those capacitors should be placed as close to the IC as possible.
BYPASSING CAPACITORS
One of the key efforts in implementing the MLP package on a pc board is the design of the land pattern. The MLP has rectangular metallized terminals exposed on the bottom surface of the package body. Electrical and mechanical connection between the component and the pc board is made by screen printing solder paste on the pc board and then reflowing the paste after placement. To guarantee reliable solder joints it is essential to design the land pattern to the MLP terminal pattern, exposed PAD, and Thermal PAD via. There are two basic designs for PCB land pads for the MLP: Copper Defined style (also known as Non Solder Mask Defined (NSMD)) and the Solder Mask Defined style (SMD). The industry has had some debate on the merits of both styles and although Microsemi recommends the Copper Defined style land pad (NSMD). Both styles are acceptable for use with the MLP package. NSMD pads are recommended over SMD pads due to the tighter tolerance on copper etching than solder masking. NSDM by definition also provides a larger copper pad area and allows the solder to anchor to the edges of the copper pads thus providing improved solder joint reliability. EXPOSED PAD PCB DESIGN The construction of the Exposed Pad MLP enables enhanced thermal and electrical characteristics. In order to take full advantage of this feature the exposed pad must be physically connected to the PCB substrate with solder. The exposed pad is internally connected to the die substrate potential which is VNEG so it is very important that the PCB substrate potential be connected to VNEG as well. The thermal pad (D2th) should be greater than D2 of the MLP whenever possible; however adequate clearance (Cpl > 0.15mm) must be met to prevent solder bridging. If this clearance cannot be met, then D2th should be reduced in area. The formula would be: D2TH > D2 only if D2TH < Gmin - (2 x Cpl).
C7, C10, C11, C12, C13, and C16 are bypassing capacitors for input supplies and internal reference voltage (2.5V), nominal value is 1F. These capacitors should be placed as close to the IC as possible also, to guarantee low ripples and noise.
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 10
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
APPLICATION NOTE/PCB DESIGN GUIDLINE (CONTINUED) THERMAL PAD VIA DESIGN
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There are two types of on-board thermal PAD designs: one is using thermal vias to sink the heat to the other layer with metal traces. Based on the Jedec Specification (JESD 51-5) the thermal vias should be designed like Figure 5. Another one is the no via thermal PAD which is using the same copper PAD as heat sink, this type of thermal PAD is good for a two layer board, since the bottom side is filled with all other kinds of trace also, it's hard to use the whole plane for the heat sink. But you still can use vias to sink the heat to the bottom layer by the metal traces, then layout a NMSD on which a metal heat sink is put to sink the heat to the air.
The LX1708 is supplied in an MLPQ - 7mm x 7mm, 32 pin package. JA = 15.5C/W for the package by itself in still air. When running at a continuous 20W output power, the on-chip power dissipation will be 3.5W assuming 85% efficiency. With no reduction in the thermal resistance, the die temperature will rise 103 about ambient. JC is about 4 C/W. if the exposed pad is properly connected to a heat sink, then the temperature rise will be reduced to around 16C under these conditions. So the via type thermal PAD is suggested.
~0.85mm
~0.025mm
Zmin ~7.45mm
~0.355mm 0.305mm
D2th ~5.15mm 1.2mm Gmin ~6.00mm
Micro Lead Quad Land Pattern for Four Package Land Pattern Layer Board with Vias Figure 5 - Comparison of land pattern theory
O 0.3mm
5.00mm
Figure 6 - Recommended Land Pad with Vias for LQ32 (7mm2)
Zmin=D + aaa+ 2(0.2) (where pkg body tolerance aaa=0.15) (where 0.2 is outer pad extension) Gmin=D-2(Lmax)-2(0.05) (where 0.05 is inner pad extension) (Lmax=0.05 for this example) D2th max = Gmin-2(CpL) (where CpL=0.2)
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 11
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
PRINTED CIRCUIT BOARD FOR THE LXE1708
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Figure 7 - Inner Layer 1
Figure 8 - Bottom Layer
Figure 10 - Inner Layer 2 Figure 9 - Top Layer
Figure 11 - Top Component Layer
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 12
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
LX1708 EVAL KIT BILL OF MATERIALS
WWW .Microsemi .C OM
MISCELLANEOUS COMPONENTS Line Item
1 2 3 4 5 6 7 8 9 10
Part Description
Microsemi IC Controller LX1708 Class-D Audio Amplifier Diode, Schottky Jack, PCB Mount, RCA Header, 2 Position Vertical Header, 3 Position, 2 Row Vertical 0.1" Centers Switch, SPDT, PCB Mount Subminiature Terminal Block, 2 Position Terminal, Compact, Test Point Terminal, Subminiature, PCB, LX1708 Evaluation Board
Manufacturer & Part # MICROSEMI MICROSEMI KEYSTONE 3M 3M C&K BLOCKMASTER KEYSTONE KEYSTONE MICROSEMI CAPACITORS
GT11MSAKE 301-021-1000 5016 5015 SGE2874-X1 LX1708ILQ UPS5817 901 929450-01-02-1
Case
MLPQ-32
Powermite
Reference Designators
U1 CR1, CR2, CR7, CR8 J1, J2 JP1 - JP7 JP3 SW1 TB1, TB2, TB3, TB4
Qty
1 N/U 2 6 1 1 4 2 9
SMT SMT
TP1, TP7 TP2, TP3, TP4, TP5, TP6, TP8, TP9, TP10, TP11
Line Item
11 12 13 14 15 16
Part Description
Capacitor, Elect., 47F, 35V, 20%, KS Type Capacitor, Elect., 22F, 10V, 20%, KS Type Capacitor, Ceramic, .47F, 16V, 10% Capacitor, Ceramic, X5R, 1F, 25V, 10%, Capacitor, Ceramic, 4700pF, 50V, 10%, Capacitor, Ceramic, 2200pF, 50V, 10%
Manufacturer & Part #
PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC ECEA1VKS470i ECEA1AkS220i ECJ2YB1C474K ECJ-2FB1E105K ECJ-1VB1H472K ECJ-1VB1H222K
Case
Thru Thru 0805 0805 0603 0603
Reference Designators
C1 C2 C3, C4, C5, C6 C7, C8, C9, C10, C11, C12, C13, C14, C15, C16 C17, C19, C21, C23 C18, C20, C22, C24
Qty
1 1 4 10 4 4
RESISTORS Line Item
17 18
Part Description
Resistor, 25.5K Ohm, 1/10W, 1% Resistor 470 Ohm, 1/10W, 5%
Manufacturer & Part # PANASONIC PANASONIC
ERJ3EKF2552V ERJ3GSYJ471
Case
0603 0603
Reference Designators
R1 R2, R3, R4, R5, R6, R7, R8, R9
Qty
1 8
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 13
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
THD VS PWR @ 4 OHM WITH DIODES
THD VS PWR @ 4 OHM NO DIODES
WWW .Microsemi .C OM
THD+N VS. FREQUENCY
100 50 20 10 5 2 1 0.5 % 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20
GAIN RESPONSE
PVDD = 12V, V5V = 5V PO = 1W, 10Hz ~ 22KHz BPF Load 4
Without Diodes
With Diodes
See Note 1 on Schematic 50 100 200 500 Hz 1k 2k 5k 10k 20k
C CHARTS
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 14
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
NOISE FLOOR & SIGNAL-TO-NOISE RATIO
CHANNEL CROSSTALK
WWW .Microsemi .C OM
OUTPUT POWER BANDWIDTH @ 1% THD
100%
EFFICIENCY @ 4 OHM LOAD
Without LC Filter 90% 80% With LC Filter 70% Efficiency (%) 60% 50% 40% 30% 20% 10% 0% 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Power/CH (W)
C CHARTS
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 15
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
IQQ VS. FREQUENCY
40 35 30 25 IQQ (mA) 20 15 10 5 0 150k 250k 350k 450k 550k 650k 750k 850k 950k 1,050k 1,150k
PSRR (AC)
WWW .Microsemi .C OM
SW Freq. (Hz)
IQQ VS. SUPPLY
35 30
16 20 18
POWER VS. SUPPLY VOLTAGE
25 IQQ (mA) 20 15 10 5 0
Power/CH (W)
With LC Filter 4OHM Resistor Load
14 12 10 8 6 R=4ohm; FIN = 1kHz THD+N <= 1%
Without LC Filter 4OHM Speaker Load
Without LC Filter NO Load
4 2
5
6
7
8
9 10 Supply (V)
11
12
13
14
15
0 5 6 7 8 9 10 11 12 13 14 15 Supply Voltage (V)
C CHARTS
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 16
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
PACKAGE DIMENSIONS
WWW .Microsemi .C OM
LQ
32-Pin MLPQ Plastic (7x7mm EP)
D b E2
L
E
D2
e
Dim A A1 A3 b D D2 E E2 e L
Note:
MILLIMETERS MIN MAX 0.80 1.00 0 0.05 0.25 REF 0.23 0.38 7.00 BSC 5.00 5.25 7.00 BSC 5.00 5.25 0.65 BSC 0.45 0.65
INCHES MIN MAX 0.031 0.039 0 0.002 0.010 0.009 0.015 0.276 BSC 0.197 0.207 0.276 BSC 0.197 0.207 0.026 0.018 0.026
A1 A3
A
1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(.006") on any side. Lead dimension shall not include solder coverage.
M MECHANICALS
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 17
LX1708
TM (R)
15+15W Stereo Filterless Class-D Amplifier
PRODUCTION DATA SHEET
NOTES
WWW .Microsemi .C OM
N NOTES
PRELIMINARY DATA - Information contained in this document is pre-production data and is proprietary to Microsemi. It may not be modified in any way without the express written consent of Microsemi. Product referred to herein is offered in pre-production form only and may not have completed Microsemi's Quality Assurance process for Release to Production. Microsemi reserves the right to change or discontinue this proposed product at any time.
Copyright (c) 2004 Rev.1.2, 2007-01-05
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 18


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